There is a general need for materials with low dielectric constants (low-k) in the integrated circuit manufacturing industry. Using low-k materials as the interlayer dielectric of conductive interconnects reduces the delay in signal propagation and signal crosstalk due to capacitive effects. The lower the dielectric constant of the dielectric, the lower the capacitance of the dielectric and the RC delay in the lines and signal crosstalk between electrical lines of the IC. Further, the use of low k materials as interlayer dielectrics will reduce power consumption of complex integrated circuits.
Low-k dielectrics are conventionally defined as those materials that have a dielectric constant (k) lower than that of silicon dioxide (SiO2), that is k<˜4. Generally, they have a dielectric constant of 3 or less. Typical methods of obtaining low-k materials include introducing pores into the dielectric matrix and/or doping silicon dioxide with various hydrocarbons or fluorine. In technology nodes of 90 nanometers and beyond (e.g., 65 nanometers), carbon doped oxide dielectric materials look extremely promising. However, wide spread deployment of these materials in modern integrated circuit fabrication processes is hindered by increasing demands for high mechanical strength coupled with lower dielectric constants. For certain applications, it is now necessary to use dielectric materials having k values below about 2.7.
The International Technology Road Map for Semiconductors (ITRS) specifies that materials with dielectric constants (k) of 2.4 to 2.7 will be required for the 45 nm technology node. Plasma Enhanced Chemical Vapor Deposition (PECVD) carbon doped silicon oxide (CDO) is used for 90 nm and 65 nm technology nodes with k ranging between 2.8 and 3.2. Further reduction of the dielectric constant to below 2.7 is achievable through incorporation of additional methyl groups and/or free space. Typically, this is accomplished through co-deposition of a backbone precursor and a porogen. The porogen is driven out during a cure step, leaving the backbone and increased free space behind. This free space can lead to degraded mechanical properties of the film relative to fully dense materials. It also allows penetration of moisture and solvents during integration, potentially lowering the interconnect performance.